diff -uNra a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile --- a/arch/arm64/boot/dts/rockchip/Makefile 2026-09-15 15:33:28.901491319 +0800 +++ b/arch/arm64/boot/dts/rockchip/Makefile 2026-09-15 15:47:02.660858998 +0800 @@ -25,6 +25,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-iflyhome-i01.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-pc.dtb diff -uNra a/arch/arm64/boot/dts/rockchip/rk3328-iflyhome-i01.dts b/arch/arm64/boot/dts/rockchip/rk3328-iflyhome-i01.dts --- a/arch/arm64/boot/dts/rockchip/rk3328-iflyhome-i01.dts 1970-01-01 08:00:00.000000000 +0800 +++ b/arch/arm64/boot/dts/rockchip/rk3328-iflyhome-i01.dts 2026-09-15 15:46:37.448093445 +0800 @@ -0,0 +1,375 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * iFLYHOME I01 - RK3328 + * + * First mainline/OpenWrt bring-up DTS. + * Reconstructed from the original Rockchip 3.10 BSP DTB and compared with + * mainline rk3328-rock64.dts / rk3328-roc.dtsi. + * + * Known board facts from vendor DT: + * - RK3328 + * - RK805 @ I2C1 / 0x18 + * - eMMC on ff520000, 8-bit, HS200 capable + * - RTL8822CS Wi-Fi on ff500000 (mainline label: &sdmmc) + * - RTL8822CS BT on UART2 (ff130000), enable GPIO1_D0 + * - debug console on UART1 (ff120000) + * - GMAC2IO RGMII, external 125 MHz clock + * - PHY reset GPIO2_A3, tx_delay 0x26, rx_delay 0x20 + * - LEDs GPIO0_A2 / GPIO0_A0 + * - power key GPIO1_D2 + * + * Keep the first boot conservative: audio, HDMI and IR are not enabled here. + */ + +/dts-v1/; + +#include "rk3328.dtsi" +#include + +/ { + model = "iFLYHOME I01"; + compatible = "iflyhome,i01", "rockchip,rk3328"; + + aliases { + ethernet0 = &gmac2io; + mmc0 = &emmc; + mmc1 = &sdmmc; /* RTL8822CS SDIO, despite the mainline label name */ + }; + + chosen { + /* Vendor BSP debug output uses UART1 @ ff120000. */ + stdout-path = "serial1:115200n8"; + }; + + gmac_clkin: external-gmac-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + clock-output-names = "gmac_clkin"; + }; + + vcc_sys: regulator-vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + /* + * Vendor property WIFI,poweren_gpio = GPIO1_C2, active high. + * mmc-pwrseq-simple models that line as an active-low reset: asserted LOW, + * released HIGH. This gives the same electrical power-enable behaviour. + */ + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + post-power-on-delay-ms = <200>; + }; + + leds { + compatible = "gpio-leds"; + + led_work: led-0 { + label = "i01:work"; + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + led_standby: led-1 { + label = "i01:standby"; + gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + key-power { + label = "Power"; + linux,code = ; + gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&cpu2 { + cpu-supply = <&vdd_arm>; +}; + +&cpu3 { + cpu-supply = <&vdd_arm>; +}; + +/* Samsung eMMC: vendor BSP enables 8-bit, DDR and HS200. */ +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; + vmmc-supply = <&vcc_io>; + vqmmc-supply = <&vcc18_emmc>; + status = "okay"; +}; + +/* + * IMPORTANT: + * Vendor BSP: rksdmmc@ff500000 is the RTL8822CS Wi-Fi bus. + * Mainline rk3328.dtsi calls ff500000 "sdmmc", not "sdio". + */ +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sdio-irq; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4>; + keep-power-in-suspend; + non-removable; + mmc-pwrseq = <&sdio_pwrseq>; + max-frequency = <150000000>; + vqmmc-supply = <&vdd_18>; /* vendor sdio_vref = 1800 mV */ + status = "okay"; +}; + +/* ff510000 was disabled in the vendor DT; keep it disabled. */ +&sdio { + status = "disabled"; +}; + +&gmac2io { + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; + clock_in_out = "input"; + phy-mode = "rgmii"; + phy-supply = <&vcc_io>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmiim1_pins>; + + /* Vendor BSP values -- do not replace with ROCK64 GPIO/delays. */ + snps,reset-gpio = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x26>; + rx_delay = <0x20>; + + status = "okay"; +}; + +/* RK805 is physically connected to I2C1 @ ff160000. */ +&i2c1 { + status = "okay"; + + rk805: pmic@18 { + compatible = "rockchip,rk805"; + reg = <0x18>; + + /* + * Vendor 3.10 RK805 gpios: + * pmic_int = GPIO2_D2 + * pmic_sleep = GPIO2_C6 + * RK805 INT is active low in mainline. + */ + interrupt-parent = <&gpio2>; + interrupts = ; + + #clock-cells = <1>; + clock-output-names = "xin32k", "rk805-clkout2"; + gpio-controller; + #gpio-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_io>; + vcc6-supply = <&vcc_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1150000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1150000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-name = "vcc_io"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vdd_18: LDO_REG1 { + regulator-name = "vdd_18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc18_emmc: LDO_REG2 { + regulator-name = "vcc18_emmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + /* Vendor board uses 1.1 V here, not ROCK64/ROC-CC's 1.0 V. */ + vdd_11: LDO_REG3 { + regulator-name = "vdd_11"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1100000>; + }; + }; + }; + }; +}; + +&io_domains { + status = "okay"; + vccio1-supply = <&vcc_io>; + vccio2-supply = <&vcc18_emmc>; + vccio3-supply = <&vcc18_emmc>; + vccio4-supply = <&vdd_18>; + vccio5-supply = <&vcc_io>; + vccio6-supply = <&vcc_io>; + pmuio-supply = <&vcc_io>; +}; + +&pinctrl { + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + /* Vendor RK805 pmic_sleep = GPIO2_C6; retained for later suspend/poweroff work. */ + pmic_sleep_l: pmic-sleep-l { + rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +/* Existing physical debug console. */ +&uart1 { + status = "okay"; +}; + +/* + * Vendor BSP leaves UART2 enabled and uses a separate bluetooth-platdata node. + * On this board it is very likely the RTL8822CS Bluetooth UART. + */ +&uart2 { + status = "okay"; + + bluetooth { + compatible = "realtek,rtl8822cs-bt"; + enable-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; + max-speed = <1500000>; + }; +}; + +&tsadc { + status = "okay"; +}; + +&u2phy { + status = "okay"; +}; + +&u2phy_host { + status = "okay"; +}; + +&u2phy_otg { + status = "okay"; +}; + +&usb20_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbdrd3 { + dr_mode = "host"; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +};